面向HLS-FPGA设计的大规模矩阵运算资源复用策略

Matrix operations (MOPs) are essential for various computational tasks, particularly in deep learning models, which have grown increasingly complex. As these models expand, their demand for computational resources increases significantly, making deployment on resource-limited hardware platforms, such as field-programmable gate arrays, more challenging, especially in balancing resource allocation and computation latency. Reuse-control techniques have been employed to optimize resource allocation by enabling multiple operations to share the same computational units, such as digital signal processors. Yet, this approach presents a tradeoff between resource utilization and latency. In this study, we tackle this challenge by thoroughly analyzing existing reuse-control mechanisms and introducing a novel integer linear programming (ILP)-based strategy. Our experimental results demonstrate that the proposed approach not only improves resource utilization for large-scale MOPs but also significantly reduces latency compared to existing methods. In the best case, on the ResNet model, our ILP-based method achieves up to $2.21\times$ lower latency and $2.14\times$ lower energy consumption per inference, demonstrating significantly improved performance and energy efficiency. In addition, our work provides a new optimization perspective for hardware design based on high-level synthesis.